A general definition of jitter means that jitter is a measure of the time deviation that the waveform exhibits at its significant instants from an ideal reference. In a digital signal, the significant instants are the transition points. The reference can be generated from the sampled data or is externally provided.
In the upper part of FIG. 1, the timing diagram of a data signal S is illustrated. Below the course of the data signal S an enlarged part of a part of the data signal is shown. As it can be seen, due to the jitter the points of time at which the state of the signal changes cannot exactly be defined and the bigger the jitter gets, the smaller the eye opening EO gets.
The sources of jitter can be grouped into three categories. The first category includes all random noise processes including the shot noise, thermal noise, and pink noise found in electronic components and subsystems such as oscillators and phase locked loops (PLL). The second group includes systematic effects such as crosstalk and spurious from adjacent lines and circuitry, and duty cycle distortion which is a measure of the symmetry of the high and low driving functions. The third category comprises all sources that exhibit data dependency including mechanisms such as intersymbol interference (ISI), dispersion, and word synchronized distortion.
Jitter is decomposed to two characteristic components which are termed “deterministic” and “random.” The former is caused by systematic and data dependent sources, and the latter caused by noise mechanisms assumed to be Gaussian. Thus, the phase error function φ(t), is the sum of two composite functions:φ(t)=φ(t)D+φ(t)R.wherein
φ(t)D, the deterministic component, is the addition of all functions of phase (or jitter) that will achieve their maximums and minimums in a defined time period—it follows that they are known as “bounded” sources, and
φ(t)R is the sum of all Gaussian noise sources. Since Gaussian noise can be arbitrarily large it is considered “unbounded”.
High-speed serial (HSS) link I/O ASIC cores frequently need to be compliant with standards, e.g. XAUI, FiberChannel, OIF SxI-5, or Infiniband, that specify the jitter by means of jitter numbers. These jitter numbers are termed DJ for deterministic jitter number, RJ for random jitter number and TJ for total jitter number and refer to a certain bit error rate (BER) boundary, e.g. BER=10−12. Furthermore, test chips of the HSS cores need to be tested for compliance with jitter tolerance or jitter transfer masks. For this purpose, it is necessary to determine or capture the jitter.
The following methods are commonly applied for jitter measurements in serial links.
A first commonly used jitter characterization method is to analyze the eye diagram on an oscilloscope. How this can be done is described in Tektronix Datasheet, “RT-Eye Serial Data Compliance and Analysis Software, TDSRT-Eye”, 2003 or Anritsu Datasheet, “MX176400A: Q and Eye Analysis Software”, 2001. This method allows to measure the peak-to-peak jitter of the eye crossings by means of histogram functions. However, there is no direct relationship between the peak-to-peak jitter and a specific bit error rate BER. Furthermore, the method is not applicable for being used at runtime, this means during user data are transferred.
A second commonly used method for jitter characterization is the bit error rate test (BERT) scan method described in “Jitter and the new digital regime”, Brian Fetz, Agilent Technologies or “Relationship between eye diagram and bathtub curves”, Wavecrest Corporation, Technical Bulletin #13, 2003. A dedicated bit error rate tester is used to perform jitter bathtub curve measurements and to fit a jitter model for the extraction of the required jitter numbers. This method yields very accurate results but it is not applicable for a large number of links and cannot be used at runtime.
Finally, a third method for jitter characterization is known by which build in self test (BIST) functions are used. It is illustrated in the International Business Machines patent application EP 03405341.3 “Adjusting parameters of a serial link” filed on May 19, 2003. The built-in-self-test functions of a serializer/deserializer (SERDES) chip contain a pseudo random bit sequence generator and an error detector used for ‘spot’ BER measurements. As shown in this patent application, an extension of the BIST concept also allows to perform bit error rate test scan measurements. The advantage of this concept is that the desired jitter numbers for a specific BER boundary can be determined even for a large number of serial links. However, the disadvantage is that this measurement method fails at asynchronous operation and the SERDES cannot be operated with user data.
Therefore, none of the above mentioned methods is perfectly suited to meet the requirements specified for an asynchronous serial link and which is applicable for being used at runtime.